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Shail Dave

Sch Compt Infor & Dec Sys Engr
Grad Research Associate
Graduate Assistant/Associate, TEMPE Campus, Mailcode 8809
Student Information:
Graduate Student
Computer Engineering (Computer Systems)
Ira A Fulton Engineering

Biography

I am a graduate student in Computer Engineering at SCIDSE, ASU beginning spring 2017. Prior joining the doctoral program, I earned my master's at ASU in Computer Engineering in 2016. My coursework and interest lie in VLSI and Architecture area. I am interested in exploring compilers and architectures for reconfigurable accelerators (in specific, Coarse-Grained Reconfigurable Arrays (CGRAs) which are energy-efficient accelerators that can speed-up even non-vectorizable performance-critical loops). My research at Compiler Microarchitecture Lab is advised by Prof. Aviral Shrivastava and it is focused on developing compilation and micro-architecture support for CGRAs. Moreover, I have been contributing to the development an open-source CPU-CGRA compiler-simulator infrastructure through which the execution of compute-intensive applications can be verified. Simultaneously, I strive to determine better architectural choices through my work e.g. data memory bottleneck, an efficient communication interface between multi-cores and accelerator etc. My industry experiences are in the field of compilers, RTL Design/Verification for ASIC/FPGA. 

Research Interests

I am interested in exploring computer architectures and challenges in digital design. In particular, my research interests include, but not limited to -

  • Hardware Accelerators including Coarse-Grained Re-configurable Arrays (CGRAs)
  • Compilers
  • Embedded Systems
  • High-Performance Computing
  • Deep Learning
Research Group
Publications
  • Shail Dave, Mahesh Balasubramanian, Aviral Shrivastava, "RAMP: Resource-Aware Mapping for CGRAs", in Proceedings of the 55th Annual Design Automation Conference (DAC), 2018
  • Shail Dave, Mahesh Balasubramanian, Aviral Shrivastava, "URECA: A Compiler Solution to Manage Unified Register File for CGRAs", in Proceedings of the 21st International Conference on Design Automation and Test in Europe (DATE), 2018
  • Mahesh Balasubramanian, Shail Dave, Aviral Shrivastava, Reiley Jeyapaul, "LASER: A Hardware/Software Approach to Accelerate Complicated Loops on CGRAs",  in Proceedings of the 21st International Conference on Design Automation and Test in Europe (DATE), 2018
Fall 2017
Course NumberCourse Title
CSE 420Computer Architecture I
Honors / Awards
  • Outstanding CEN TA Award, CIDSE, ASU - Spring 2018
  • Engineering Grad Fellowship, April 2018
  • A. Richard Newton Young Student Fellowship - 53rd Annual Design Automation Conference (DAC)
  • CIDSE Travel Grant - Summer 2018
  • Computer Engineering Travel Grant - Spring 2018
  • GPSA Travel Grant Arizona State University - Summer 2016, Spring 2018
Professional Associations
  • IEEE Computer Society
  • IEEE Student Membership
  • IEEE Council on Design Automation (CEDA)
  • Eta Kappa Nu
Service

External/Expert Reviewer -

  • ACM Design Automation Conference (DAC) - 2018
  • IEEE/ACM/IFIP International Conference on Hardware-Software Codesign and System Synthesis (CODES+ISSS) - 2016, 2017
  • International Conference on Design Automation and Test in Europe (DATE) - 2016, 2017
  • International Conference on VLSI Design (VLSID) - 2017, 2018

Journals Referring - 

  • ACM Transactions on Embedded Computing Systems (TECS) - 2017
  • IEEE Transactions on Multi-Scale Computing Systems (TMSCS) - 2016, 2017
  • International Journal on Design Automation for Embedded Systems, Springer - 2017

Voluntary

  • Graduate Vice Chair, IEEE Eta Kappa Nu, ASU Chapter (2016-2017)
  • Webmaster, Compiler Microarchitecture Lab, 2017--Present
  • Invited Speaker, International Student Orientation, GPSA, ASU - 2016, 2017 
Industry Positions
  • Software Engineer (Intern), Code Efficiency Group, The Mathworks, Natick, MA (May 2018--Present)
  • ASIC Verification Engineer Intern, SanDisk Corporation, Milpitas, CA (Summer 2015) 
  • Intern, Space Application Center, Indian Space Research Organization, India (Spring 2014)